Method and Device of Measuring Interface Trap Density in Semiconductor Device

ABSTRACT

A method is provided for measuring interface trap density in a semiconductor device. In the method, measurement parameters are input to a host computer. A pulse condition is set at a pulse generator using the measurement parameters. A pulse of a predetermined frequency generated by the pulse generator is applied to a gate of a transistor, and a charge pumping current is measured from a bulk of the transistor. A charge pumping current measurement may be repeated for a plurality of frequencies while changing the frequency until a set frequency is reached. A pure charge pumping current is calculated for each frequency where a gate tunneling leakage current is removed from the charge pumping current measured for each frequency. Interface trap density is calculated from the calculated pure charge pumping current for each frequency.

This application is a divisional of co-pending U.S. patent applicationSer. No. 11/646,806, filed Dec. 27, 2006 (Attorney Docket No.SPO200611-0001US), which is incorporated herein by reference in itsentirety.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a method and device for measuringinterface trap density in a semiconductor device.

2. Description of the Related Art

As a semiconductor technology develops constantly, the length of gatesgradually become shorter and the thickness of gate oxide layersgradually become thinner. Accordingly, characteristics of semiconductordevices are inevitably affected by these smaller dimensions. One of thecharacteristics affected is the interface trap density between a siliconsubstrate and a gate oxide layer.

Generally, when a gate oxide layer is grown, a sufficient bonding is notmade between a silicon atom and an oxygen atom, so that a dangling bond(where there are insufficient oxygen atoms) is generated at an interfacebetween a silicon substrate and the gate oxide layer.

A dangling bond easily attracts an electron when a transistor operates,thereby increasing the interface trap density of the gate oxide layer.Accordingly, the quality of the gate oxide layer deteriorates or thedriving current is reduced, which may degrade some characteristics of asemiconductor device.

Traditionally, a charge pumping test has been used as a method formeasuring a surface state located under a gate oxide layer. Theinterface trap density may be calculated from data obtained using thistest. However, when the conventional method is applied to a devicehaving a very thin gate oxide layer, gate tunneling leakage currentand/or quantum mechanical effects can result in an incorrect calculationof the interface trap density (generally resulting in a calculatedinterface trap density that is too high).

SUMMARY OF THE INVENTION

Accordingly, the present invention is directed to a method and devicefor measuring interface trap density in a semiconductor device thatsubstantially obviates one or more problems due to limitations anddisadvantages of the related art.

An object of the present invention is to more accurately measure andcalculate interface trap density in a semiconductor device having a thingate oxide layer.

Additional advantages, objects, and features of the invention will beset forth in part in the description which follows and in part willbecome apparent to those having ordinary skill in the art uponexamination of the following or may be learned from practice of theinvention. The objectives and other advantages of the invention may berealized and attained by the structure particularly pointed out in thewritten description and claims hereof as well as the appended drawings.

To achieve these objects and other advantages and in accordance with thepurpose of the invention, as embodied and broadly described herein,there is provided a method for measuring interface trap density, themethod including: inputting measurement parameters to a host computer;setting a pulse condition at a pulse generator using the measurementparameters; applying a pulse of a predetermined frequency generated bythe pulse generator to a gate of a transistor; measuring a chargepumping current from a bulk of the transistor; repeating a chargepumping current measurement for a plurality of frequencies whilechanging a frequency until a set frequency is reached; calculating apure charge pumping current for each frequency where a gate tunnelingleakage current is removed from the charge pumping current measured foreach frequency; and calculating interface trap density from thecalculated pure charge pumping current for each frequency.

Also, there is provided a device for measuring interface trap density,the device including: a host computer to input measurement parameters; apulse generator to generate a pulse of a predetermined frequency byusing the measurement parameters, wherein the pulse is applied to anobject wafer; and an amperemeter to measure a charge pumping currentfrom the object wafer.

It is to be understood that both the foregoing general description andthe following detailed description of the present invention areexemplary and explanatory and are intended to provide furtherexplanation of the invention as claimed.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included to provide a furtherunderstanding of the invention and are incorporated in and constitute apart of this application, illustrate embodiment(s) of the invention andtogether with the description serve to explain the principle of theinvention. In the drawings:

FIG. 1 is a view illustrating an apparatus for measuring a chargepumping current according to an embodiment of the present invention;

FIG. 2 is a graph illustrating a charge pumping current versus a highlevel gate voltage for each frequency according to an embodiment of thepresent invention; and

FIG. 3 is a graph illustrating interface trap density versus a pulsefrequency according to an embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

Reference will now be made in detail to the preferred embodiments of thepresent invention, examples of which are illustrated in the accompanyingdrawings.

FIG. 1 is a view illustrating a construction of an apparatus formeasuring a charge pumping current according to an embodiment of thepresent invention.

Referring to FIG. 1, a pulse 16 having a fixed base voltage is appliedto a gate 12 of a transistor in wafer 10, with source/drain 11 of thetransistor grounded, and an amperemeter 17 in a measuring apparatusconnected to a bulk 13 (also called a body or a base) of the transistor.Accordingly, a gate channel of the transistor operates between anaccumulation state and an inversion state to generate the charge pumpingcurrent (I_(cp)). This current is measured from the bulk 13 (e.g. byamperemeter 17).

The pulse 16 has a fixed low level gate voltage (i.e., a base voltage)and an increasing high level gate voltage (i.e., a peak voltage). Thepulse 16 is generated at a pulse generator 14 (e.g., HP8110A). Aselector 15 (e.g., HP16440A) controls the pulse 16 generated at thepulse generator 14 and applies the pulse 16 for a predetermined time formeasurement. That is, the selector 15 serves as a switch. Meanwhile,though not shown in the drawing, a probe station on which the wafer 10is put, and a host computer responsible for an overall control are alsoparts of the measuring apparatus.

Hereinafter, a method for measuring interface trap density will bedescribed.

First, measurement parameters may be input to the host computer.Examples of the measurement parameters include a width and a length of agate (i.e., an area of a gate), a base voltage of a pulse, an initialpeak voltage of a pulse, a final peak voltage of a pulse, a pulsefrequency, and/or a pulse width. Pulse generator 14 may be configuredwith a pulse condition according to the measurement parameters as inputto the host computer. In a preferred embodiment, the pulse conditionincludes a predetermined value of a pulse frequency.

The pulse 16 of the predetermined frequency is generated by the pulsegenerator 14. The selector 15 is operated to apply the pulse 16 of thepredetermined frequency to the gate 12. After a charge pumping currentI_(cp) is measured from the bulk 13, the selector 15 is stopped. Themeasurement of a charge pumping current is repeatedly performed for eachfrequency. A pulse frequency to be measured may be set in advance (e.g.,by configuring the measurement parameters). In one embodiment, themeasurement of a charge pumping current may be repeated while the pulsefrequency is changed until a set frequency is reached. Measurementvalues of a charge pumping current may be obtained for a plurality offrequencies in this manner.

The measured charge pumping current value generally includes a gatetunneling leakage current. Therefore, a “pure” charge pumping currentfor each frequency may be calculated according to Equation 1 below.

I _(cp)(ƒ₂)−I _(cp)(ƒ₁)=[I _(cp0)(ƒ₂)+I _(tunneling)]−[I _(cp0)(ƒ₁)+I_(tunneling) ]=I _(cp0)(ƒ₂−ƒ₁),  Equation 1

where I_(cp)(f₁) and I_(cp)(f₂) are charge pumping currents measured fora first frequency and a second frequency, respectively, I_(tunneling) isa leakage current, and I_(cp0)(f₁) and I_(cp0)(f₂) are pure chargepumping currents for the first and second frequencies, respectively,where an influence of a leakage current has been removed.

A pure charge pumping current is calculated by measuring charge pumpingcurrents at two frequencies, respectively, and subtracting according toEquation 1. For example, a pure charge pumping current value at afrequency of 1 MHz (e.g., a where a tunneling current has been removed)may be obtained by subtracting a charge pumping current value measuredat a frequency of 1 MHz from a charge pumping current value measured ata frequency of 2 MHz. The reason this calculation Equation 1 is possibleis that a charge pumping current is in proportion to a frequency, whilethe tunneling current is generally constant.

Charge pumping currents for each frequency calculated in this manner areillustrated in FIG. 2.

FIG. 2 is a graph illustrating a charge pumping current versus a highlevel gate voltage for a plurality of frequencies according to anembodiment of the present invention.

The interface trap density may be calculated from the “pure” chargepumping current according to Equation 2 below.

$\begin{matrix}{{N_{it} = \frac{I_{cp}}{f \times A_{g} \times q}},} & {{Equation}\mspace{14mu} 2}\end{matrix}$

where N_(it) is the interface trap density, I_(cp) is the calculatedpure charge pumping current, f is the frequency at which the chargepumping current was measured, A_(g) is an area of a gate, and q is anamount of charge.

FIG. 3 illustrates interface trap densities calculating according toEquation 2 for a plurality of frequencies.

FIG. 3 demonstrates that the interface trap density calculated accordingthe present invention is generally constant even when the pulsefrequency changes. In contrast, when conventional measuring methods areapplied to a transistor with a thin gate oxide layer, the calculatedinterface trap density may erroneously increase as the frequencydecreases. In some cases, measurement of the interface trap density fortransistors with thing gate oxide films may be impossible. On the otherhand, the present invention can obtain an accurate result valueregardless of the pulse frequency as illustrated in FIG. 3.

As described above, the present invention can obtain accurate data ofhigh reliability when measuring and calculating interface trap densityin a semiconductor device having a thin gate oxide layer.

It will be apparent to those skilled in the art that variousmodifications and variations can be made in the present invention. Thus,it is intended that the present invention covers the modifications andvariations of this invention provided they come within the scope of theappended claims and their equivalents.

1. A device for measuring interface trap density, the device comprising:a pulse generator configured to generate a pulse of a predeterminedfrequency, wherein the pulse is applied to an object wafer; and anamperemeter configured to measure a charge pumping current from theobject wafer.
 2. The device of claim 1, further comprising a hostcomputer configured to receive at least one measurement parameterrequired for measurement, and wherein the pulse generator is configuredto generate the pulse in accordance with the at least one measurementparameter.
 3. The device according to claim 2, further comprising aselector which controls the pulse generated at the pulse generator. 4.The device according to claim 1, wherein the wafer has a transistorcomprising a gate, a grounded source/drain, and a bulk, and wherein thepulse is applied to the gate and the amperemeter is connected to thebulk.
 5. The device according to claim 4, wherein the pulse has a fixedbase voltage.
 6. The device according to claim 4, the transistor furthercomprising a gate channel, wherein the gate channel operates between anaccumulation state and an inversion state to generate the charge pumpingcurrent (I_(cp)).
 7. The device according to claim 4, wherein the pulsegenerated from the pulse generator comprises a fixed low level gatevoltage and an increasing high level gate voltage.